Quantcast
Channel: Intel® Software - Intel® Many Integrated Core Architecture (Intel MIC Architecture)
Browsing all 1789 articles
Browse latest View live

Phi Supported Motherboards

Hi,I've just bought a Phi as part of the promotion and am looking to do some code optimization and energy measurement on it. I need to build a workstation and have been looking at appropriate...

View Article


over-heating issues

I have a 31S1p which over-heats. I put a 70 CFM fan in the front of it, and built a duct, as was suggested in this forum. I put a 40 CFM fan on the back, and the card still over-heats. I even tried...

View Article


Power for multiple Xeon Phi cards

Hi,System:  Ubuntu 14.01 LTS, MPSS 3.4.1We have a server with 2KW power supply, which the manufacture claims support up to 6 Xeon Phi Cards.When I run my program on Xeon Phi (31S1P) uses all the cores...

View Article

scif_open: Permission denied

Hi,System: Ubuntu 14.04.1 LTS, MPSS 3.4.1, parallel_studio_xe_2015_update1 and  g++ (Ubuntu 4.8.2-19ubuntu1) 4.8.2.I am trying to use scif for communication with mic. However on the host node, I got...

View Article

SCIF_FENCE_INIT_SELF vs SCIF_FENCE_RAS_SELF

The SCIF PDF mentions "SCIF_FENCE_RAS_SELF" while the scif.h header file mentions SCIF_FENCE_INIT_SELF as options to the flags argument of scif_fence_mark( .. int flags ...)Which one is it?As a follow...

View Article


Faulty code with icc and OpenMP (-O2)?

Hi, please consider the example below, which is the minimal crashing example I could create. This is seems issue which we observe in at least 2 of our applications on the MIC. I did not manage to...

View Article

pci-e mounting brackets needed

For some reason my (passively cooled) Xeon Phi cards don't have the pci-e mounting brackets with them...Is there someone who has installed several of these devices into a chassis where they didn't need...

View Article

Can't disable ECC via micsmc command

Hi all,I failed to disable ECC by "micsmc --ecc disable", the output is:Information: disabling ECC on devices: mic0...Information: 1 of 1 completeStatus: mic0: error: cannot set ECC mode: device is not...

View Article


OFED-MIC IPoIB, RDMA

Hi,I have OFED-MIC-3.5.2 with MPSS 3.4 and RHEL-7 running. When I do ibv_devices, ibv_deviceinfo I do see the scif interface as shown below. How do I run RDMA and IPoIB applications on this interface?...

View Article


Xeon Phi Performance / Energy Tradeoff Issues

HiI have been doing experiments on Xeon Phi and ran an fibonacci(40) application with varied number of core allocations (i.e. number of cores). The energy consumption was measured through...

View Article

Phtrhead + offload

Hi I create a new thread and lanch offload code in this thread but I get this error codeoffload error: cannot get function handles on the device 8117264 (error code 14) The code likes as...

View Article

Using MKL switch brings "relocation R_X86_64_32" error

I have working test project (based on Kevin's sample code from another thread). I just changed in the VS 2013 Intel Performance Libraries -> Use MKL -> Parallel (was None) and got this error....

View Article

Could not read symbols: File in wrong format

Hi,I have a solver that works fine on the host side. Now I am trying to first build executable for MIC and run natively there. I am using ifort 14.0.3 and I added the compiler flags -openmp and -mmic...

View Article


Image may be NSFW.
Clik here to view.

__MIC__ macro does not work

Hello everyone,           To solve problems like this:   undefined reference to `_mm512_xxx_xxx(), I have added __MIC__ macro into my...

View Article

MPI programs dont run on MIC's across nodes or within the nodes

I am using the intel MIC to run sample MPI programs currently.The program is a simple hello world program.#include <stdio.h> #include <mpi.h> int main (argc, argv)     int argc;     char...

View Article


Using L1/L2 cache as a scratchpad memory

Dear all,Explicitly cache control is a one of important feature in Xeonphi (MIC). How could I use the L1 or L2 as scratchpad memory and also sharing them data between the cores?In addition,  is there...

View Article

Runing linpack with native mode

Hi all,I tried to run HPL with native mode, ( I am using the pre-compiled binaries and run script in MKL)I set OMP_NUM_THREADS and MKL_NUM_THREADS, but I only find one thread running on MICDo you have...

View Article


Xeon Phi Power Management: Controlling C-states through Userspace

HiI have been trying to develop a runtime energy management library for Intel Xeon Phi using idle state control (C-states). I have read through a few blogs but I could not find answers to the...

View Article

How MIC works

Hi,I was wondering how does the application work in the MIC (native mode)? Namely, how doing the program land in each core and precisely in the thread?Thanks in advance.

View Article

Status of threads

Hi,How do I know the status (busy or idle) of threads or core in MIC? Is there any register to track thread's status?Thanks in advance

View Article
Browsing all 1789 articles
Browse latest View live


<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>