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FAQS: Compilers, Libraries, Performance, Profiling and Optimization.
In the period prior to the launch of Intel® Xeon Phi™ coprocessor, Intel collected questions from developers who had been involved in pilot testing. This document contains some of the most common...
View ArticleWhat collateral/documentation do you want to see?
Do you have questions that you are not finding the answers for in our documentation? Need more training, source code examples, on what specifically? Help us understand what's missing so that we can...
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Troubleshooting HOWTO: Bad hardware? MPSS? Configuration?
Are you having problems with your hardware (Cannot see your Intel(R) Xeon Phi(tm) coprocessor? Sporadic accessibility?) or with the Intel(R) Manycore Platform Software Stack (Intel(R) MPSS) running...
View ArticleNew Tools: Simple Performance Tools for the Intel® Xeon® processor line and...
Larry Meadows from Intel Corporation has developed two simple tools for the Intel® Xeon® processor line as well as the Intel® Xeon Phi™ coprocessor that allow a user to determine how well their...
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Flash Issues & Remedies
The attached document describes some common issues and questions that have been reported and how they might be addressed.AttachmentSizeDownloadFlash FAQ.pdf358.36 KB
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MICRAS Log User Guide
The attached document describes how to interpret the messages in the micras.log file.AttachmentSizeDownloadIntel(R)_Xeon_Phi(TM)_Coprocessor_MicRAS_Log_User_Guide.pdf557.07 KB
View ArticleInvitation to evaluate Intel® MKL Sparse Matrix Vector Multiply Format...
We are seeking interested parties to evaluate Intel® MKL SpMV Format Prototype Package for Intel® Xeon Phi™ coprocessors. Sparse Matrix Vector Multiply (SpMV) is an important operation in many...
View ArticleIntel(R) Xeon Phi(tm) Coprocessor -- Cluster training - call for demand!
Intel is evaluating to offer a 4 hour web-based basic tutorial covering the fundamental principles of how to integrate an Intel Xeon Phi coprocessor into a Linux based cluster.During the course each...
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performance issue of operating on overlap area between two arrays
Hi, My application program needs a lot of operators (copy/accumulate...) on two arrays' overlap. In most cases, the overlap area is not very large. A typical size is 100x100*2. I have made a simple...
View ArticleGFlops on MIC
Hello Intel,I wrote "a kind of" meta compiler to generate SIMD code on multi platform (x86, power, PHI, etc ...). I will present my work in the ISC 2014 in june. I am preparing the Super Computing...
View ArticleFew issues with mic and mpssd
As I described in another post, mpss-3.2.1 is running on kernel 3.13.10 perfectly (Fedora 20). I can run programs on the processor and have no problems except:1. mpssd daemon is taking 100% of one...
View Articleissue with MPI communication with two MIC cards and xeon processor
Hello,I am running a MPI application (involving 5 ranks) which runs smoothly when all ranks are on Xeon processor but when i put two ranks on MIC0 and MIC1 there is following issue and the program just...
View Articleopenmp compiler optimization
Dear All,I have the following code : for(k = 0; k < MAX_ITER; k++){ #pragma omp parallel for private(i,j,sum) for(i=0; i<N; i++){ sum=0.0;...
View ArticleInstalling MPSS
All,I Recently obtained a xeon-phi and I have been trying to install it. I have centos 6.5. I followed the instruction and installed the mpss service using yum install MPSS. After installing, i do...
View ArticleOffload compilation problem with -openmp option.
Hi all!I have problems using openmp and offload directives. The following (reduced) code give right result (1 2 3 4 5 0 0 0 0 0), when it's compiled without openmp ("ifort test.f -o test"),...
View ArticleAny luck with OFED-3.5-1-MIC-beta1 on CentOS 6.5?
We are trying to run with an unmodified kernel of 6.5 and MPSS 3.2.1. Here is what happens: [root@c001-n004 OFED-3.5-1-MIC-beta1]# uname -a Linux c001-n004 2.6.32-431.el6.x86_64 #1 SMP Fri Nov 22...
View ArticleHow to hybrid MIC and CPU without copy-and-paste
Hello,I know I can hybrid MIC and CPU by using synchronized offload directive.But I have one question. How to do that without copying and paste codesFor example, there is a vector addition#pragma omp...
View Articleintel atom processor
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View ArticleMIC linking issues
I am getting the incompatibility error while linking a library using -mmic flag. I dont know how to make the piece of code compatible with native mic compilation.x86_64-k1om-linux-ld: i386:x86-64...
View ArticleHow to
for example, I have#pragma offload nocopy(a) { a = malloc(sizeof(double)*ny*nx); }And now I want to initialize its first k lines from the data from HostI can do something like:inout =...
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