Hello all,

My question is quite simple, is it possible to know what addresses are hashed to a certain CHA in KNL? I have been looking for the function but I have not been able to find it, I guess the function is undocumented.

Best regards,
Marcos HV

We are currently trying to decide on the layout of our new HPC system (to replace the old one based on twin Haswell processors + 6 KNC cards). The cheapest option would be to buy 6 KNL PCIe cards, but given my experience trying to port software to the KNC cards (I've been battling with OpenFOAM and associated 3rd party libraries for the last couple of weeks, and still not got it to compile for the MICs) I'm extremely wary of these coprocessors.

Apparently the KNL socketed processors are binary-compatible with standard Xeon processors, but does the same apply to the KNL coprocessors?

There's a real dearth of information online about the KNL coprocessors. If compiling native applications for these new cards is as difficult as it was for the KNC cards, we'll probably just get 4 KNL socketed processors instead.

Thanks in advance to anyone who can shed some light on the matter!

Intel is going super fast in terms of technological breakthroughs, for example ( AVX-512,ISA-L ) etc. When will Vmware catch up on EVC compatibility, majority of the customers cannot go beyond "Nehelam". Same thing with hyper converged technologies don't know when then can catch up with Intel and start using ( AVX and ISA-L) and come up with optimized products?

Good Afternoon,

My MIC card isn't working with the newly install MPSS 3.8.2 driver. I followed the instructions in the readme to install MPSS on a new RHEL 6.9 system. Below are some of the errors that I continue to receive:

[mpss-3.8.2]micctrl -s
mic0: reset failed
[mpss-3.8.2]# micctrl -rw
          mic0: resetting
  [Error] Timeout booting MIC, check your installation

I also cannot update the firmware/smc upon installing the MPSS driver and rpms:

[mpss-3.8.2]# /usr/bin/micflash -update -device all -smcbootloader
No image path specified - Searching: /usr/share/mpss/flash
mic0: Flash image: /usr/share/mpss/flash/EXT_HP2_C0_0391-02.rom.smc
micflash: mic0: No compatible SMC boot-loader image found

[mpss-3.8.2]# /usr/bin/micflash -update -device all
No image path specified - Searching: /usr/share/mpss/flash
mic0: Flash image: /usr/share/mpss/flash/EXT_HP2_C0_0391-02.rom.smc
micflash: micflash: mic0: Failed to switch to maintenance mode: write: /sys/class/mic/mic0/state: Input/output error

My hardware is a Supermicro workstation:

[mpss-3.8.2]# dmidecode -s bios-version
3.0a
[mpss-3.8.2]# dmidecode -s system-product-name
X9DRG-QF

Thank you for any insight or input on this issue. I've been beating my head into the ground over this.

Hello all,

I'm writing to know how to estimate or calculate L1, L2 cache size of Knights Landing. 

Below is the information about Knights Landing,

Die size: 683mm^2 (31.9mm x 21.4mm)
Silicon size: 14nm
Transistor: 8 billion

Is there any equation to estimate L1, L2 cache size with information? 

Thank you.

Hello all,

I'm writting to know how to estimate or calculate L1, L2 cache size of Knights Landing. 

Below is the information about Knights Landing,
Die size: 683mm^2 (31.9mm x 21.4mm)
Silicon size: 14nm
Transistor: 8 billion

Is there any equation to estimate L1, L2 cache size with information? 

Thank you.

Hi all,

I want to know the method of profiling the power of Intel Knights Landing. Is there a way or software tools to count the power of Intel Knights Landing?

If It is, please tell me about it. 
Thank you for reading.

Hi All,

I am working with Ninja Developer Platform (NDP) with following specifications:

• Operating System: CentOS Linux 7 (Core)
• Kernel: Linux 3.10.0-514.10.2.el7.x86_64
• Architecture: x86-64 Intel(R) Xeon Phi(TM) CPU 7210 @ 1.30GHz

I have many questions around the system as I wish to run and collect data using command line only. If anyone can help me with following questions, then it will be really helpful.

System:

1. Does above system only support performance and powersave governors because of intel_pstate driver?
2. Any future plans to support ondemand, interactive, and conservative governors?
3. On sysfs interface, I can't find a files/paths where per core utilization is updated. Is it possible to collect per core utilization?
4. Is it possible to configure MCDRAM mode (flat, cache, hybird) using sysfs?
5. To capture power usage, is this the correct sysfs path: /sys/class/powercap/intel-rapl/intel-rapl\:0/energy_uj ?
6. Using sysfs again, how can I change memory power budget?
7. What is the cooling device interface at this path: /sys/class/thermal/cooling_device ?
8. I couldn't find sysfs entry for reading per core/cluster temperature. Any such path on sysfs?
9. Possible to capture power usage separately using sysfs for: core/cluster, memory, and GPU?
10. How to find range of frequencies Xeon Phi supports? On sysfs I couldn't find sysfs which list range of frequencies.
11. Is there any Intel tool that can profile workload and simulatenously capture system details like: governor, frequency, utilization, temperature, online cores, and performance counters, all via command line?
12. What is "uncore_cha_X" interface at /sys/devices ?

Booting:

1. Is this the correct link to download kernel and operating system files?
2. Since NDP is a dektop host, and not a development board. I want to know if there is a documentation on how to boot NDP via network file system? This way, I don't have to touch default system and kernel files on host, and can quickly test any kernel changes I want to implement.

Thanks.

Recently, after some updates no doubt, when I try to start up micsmc, it briefly does, but then quickly issues this error and closes:

QGtkStyle was unable to detect the current GTK+ theme.
terminate called after throwing an instance of 'mic_exception'
  what():  std::exception

micctrl --config gives

mic0:
=============================================================
    Config Version: 1.1

    Linux Kernel:   /usr/share/mpss/boot/bzImage-knightscorner
    Map File:       /usr/share/mpss/boot/System.map-knightscorner
    BootOnStart:    Enabled
    Shutdowntimeout: 300 seconds

    ExtraCommandLine: highres=off
    PowerManagment: cpufreq_on;corec6_off;pc3_on;pc6_off

    Root Device:   Dynamic Ram Filesystem /var/mpss/mic0.image.gz from:
	Base:      CPIO /usr/share/mpss/boot/initramfs-knightscorner.cpio.gz
	Overlay:   Filelist /var/mpss/sep /var/mpss/sep/sep4.1/sep.filelist on
	Overlay:   Filelist /var/mpss//amplxe/vtune_amplifier_xe_2017.4.0.518798 /var/mpss//amplxe/vtune_amplifier_xe_2017.4.0.518798/itt.filelist on
	Overlay:   Filelist /var/mpss//amplxe/vtune_amplifier_xe_2017.4.0.518798 /var/mpss//amplxe/vtune_amplifier_xe_2017.4.0.518798/amplxe.filelist on
	CommonDir: Directory /var/mpss/common
	Micdir:    Directory /var/mpss/mic0

    Network:       Static bridge br0
        MIC IP:    10.10.10.1
        Host IP:   10.10.10.254
        Net Bits:  24
        NetMask:   255.255.255.0
        MtuSize:   64512
        Hostname:  axial-mic0
        MIC MAC:   4c:79:ba:2a:06:4c
        Host MAC:  4c:79:ba:2a:06:4d

    LDAP:          Disabled
     NIS:          Disabled

    Cgroup:
        Memory:    Disabled

    Console:        hvc0
    VerboseLogging: Disabled
    CrashDump:      /var/crash/mic 16GB

I'm running CentOS Linux release 7.3.1611,  I assume this is a linux problem I need to solve, but it does mention the mic_exception.  Although I have frozen kernel updates, other system components are updated from time to time.  It would be nice if the MPSS would allow kernel updates without have to reinstall MPSS.

Thanks for any help?

I had some issues with my MIC cards, and decided to update my OS (Centose 7) and reinstall MPSS to the latest version.  Of course, I now have some problems. The MPSS installed fine, and most aspects are working, but the bridge between the host and mic cards is not working.  I can run MPI code on the host, or on all of the mic cards, but I can not run code on host+mic cards.  I'm guessing this is cause by using NetworkManager instead of network.  Although I tried to change over to network from NetworkManager as recommended, when I try to start network, I get the following problems.

Aug 04 18:42:12 axial network[26012]: RTNETLINK answers: File exists
Aug 04 18:42:12 axial network[26012]: RTNETLINK answers: File exists
Aug 04 18:42:12 axial network[26012]: RTNETLINK answers: File exists
Aug 04 18:42:12 axial network[26012]: RTNETLINK answers: File exists
Aug 04 18:42:12 axial systemd[1]: network.service: control process exited, code=exited status=1
Aug 04 18:42:12 axial systemd[1]: Failed to start LSB: Bring up/down networking.
Aug 04 18:42:12 axial systemd[1]: Unit network.service entered failed state.
Aug 04 18:42:12 axial systemd[1]: network.service failed.

I realize this is probably a linux problem, which may be related to the DHCP client, but I have yet to fix the problem.  Suggestions?

When I try to run some MPI code solely on the mic coprocessors, I get the following error:

This requires fcntl(2) to be implemented. As of 8/25/2011 it is not. Generic MPICH Message: File locking failed in ADIOI_Set_lock(fd 54,cmd F_SETLKW/7,type F_WRLCK/1,whence 0) with return value FFFFFFFF and errno 25.
- If the file system is NFS, you need to use NFS version 3, ensure that the lockd daemon is running on all the machines, and mount the directory with the 'noac' option (no attribute caching).
- If the file system is LUSTRE, ensure that the directory is mounted with the 'flock' option.
ADIOI_Set_lock:: No locks available
ADIOI_Set_lock:offset 0, length 8
application called MPI_Abort(MPI_COMM_WORLD, 1) - process 0

I've setup an NFS file share for the mic cards, and if the MPI code uses both the host and the coprocessors, no errors occur.  Any suggestions on how to modify how the mic cards mount the NFS share to comply with the above error suggestions?  Thanks!

Hi All,

Is it possible to log following per code data for Intel Xeon Phi 7210 either using sysfs or by reading any specific MSR?

• Per Core Power
• Per Core Temperature
• Per Core Utilization

Thanks.

Hi All,

I run micsmc via command line and get following error. The system is running default files which came with NDP. How can I load the MIC driver, is it a kernel module? Is micsmc supposed to work only with coprocessor platform, I have a standalone Xeon Phi 7210.

Thanks.

The changes section in the coming C++ 18.0 compiler says

"Support for the Intel® Xeon Phi™ x100 product family coprocessor (formerly code name Knights Corner) is removed in this release"

(https://software.intel.com/en-us/articles/intel-c-compiler-180-for-windo...)

So does that mean the cards become unusable if the C++ compiler is upgraded?

Surely Intel would not abandon customers in this way. Please tell me I am misunderstanding the text.

Hi all,I have two Xeon Phi 31S1P and I want to use them witn Matlab R2017a.They are perfectly installed and configured under Windows with the last driver version MPSS 3.8 as you can see from the snapshots.I also followed the guide to set the environment varaibles and all seems ok, but when try to multiply two matrix nothing happens,no automatic offload as you can see from the last snapshot. Can anyone help me to understand what is going wrong please?

I have a xeon phi coprocessor plugged in Windows computer and I want to test some ipp functions on it, but a target compilation (VS2015 Community) fails with the message: *MIC* cannot open source file "ipp.h". 

micinfo:

MicInfo Utility Log
Created Thu Aug 17 17:48:48 2017

        System Info
                HOST OS                 : Windows
                OS Version              : Microsoft Windows 10 Pro
                Driver Version          : 3.8.2.4191
                MPSS Version            : 3.8.2.4191
                Host Physical Memory    : 16244 MB

Device No: 0, Device Name: mic0

        Version
                Flash Version            : 2.1.02.0391
                SMC Firmware Version     : 1.17.6900
                SMC Boot Loader Version  : 1.8.4326
                Coprocessor OS Version   : 2.6.38.8+mpss3.8.2
                Device Serial Number     : ADKC24100331

        Board
                Vendor ID                : 0x8086
                Device ID                : 0x225c
                Subsystem ID             : 0x2500
                Coprocessor Stepping ID  : 3
                PCIe Width               : x4
                PCIe Speed               : 5 GT/s
                PCIe Max payload size    : 256 bytes
                PCIe Max read req size   : 512 bytes
                Coprocessor Model        : 0x01
                Coprocessor Model Ext    : 0x00
                Coprocessor Type         : 0x00
                Coprocessor Family       : 0x0b
                Coprocessor Family Ext   : 0x00
                Coprocessor Stepping     : B1
                Board SKU                : B1QS-7110 P/A/X
                ECC Mode                 : Enabled
                SMC HW Revision          : Product 300W Passive CS

        Cores
                Total No of Active Cores : 61
                Voltage                  : 1025000 uV
                Frequency                : 1100000 kHz

        Thermal
                Fan Speed Control        : N/A
                Fan RPM                  : N/A
                Fan PWM                  : N/A
                Die Temp                 : 53 C

        GDDR
                GDDR Vendor              : Elpida
                GDDR Version             : 0x1
                GDDR Density             : 2048 Mb
                GDDR Size                : 7936 MB
                GDDR Technology          : GDDR5
                GDDR Speed               : 5.500000 GT/s
                GDDR Frequency           : 2750000 kHz
                GDDR Voltage             : 1501000 uV

Btw, ipp.h become available immediately after switching the project to Intel compiler (before I set "Use Intel IPP" to "Single-threaded Static Library" from "No"), maybe it it somehow connected with the problem.

And is it possible at all to run ipp in offloaded mode or the library will be available only in a native app?

Hello,

I have been struggling with offload compile for my Xeon Phi x200 PCI-E (model 7210).
I am trying to compile pyMIC but I am getting the below error.
 

(root) C:\pyMIC>make.bat
libxstream.cpp
icc: warning #10362: Environment configuration problem encountered.  Please check for proper MPSS installation and environment setup.
In file included from libxstream/include/libxstream.h(34),
                 from libxstream/src/libxstream.hpp(34),
                 from libxstream/src/libxstream.cpp(32):
libxstream/include/libxstream_macros.h(214): catastrophic error: *MIC* cannot open source file "assert.h"
  # include <assert.h>
                      ^

compilation aborted for libxstream\src\libxstream.cpp (code 4)
icl: error #10340: problem encountered when performing target compilation

The "assert.h" file is located on the mic at "/usr/include". FYI, even compiling a simple Hello World example gives me the same "*MIC* cannot open source file ..." error. 

I have installed MPSS 4.4.0 with the MPSS essentials. I installed binutils on the MIC via "smart install binutils".  The MIC is detected, and is functioning properly (I can SSH into it, send files, run programs on it etc.). The only thing that does not work is the offload compile, and I am runing out of ideas to fix it (been parsing forums etc...seems like there exist mpss k1om RPMs under MPSS 3.8/3.7 that take care of this...but I couldn't find anything regarding MPSS 4.4.0.

Below is the output of MICINFO:

PS C:\Windows\system32> micinfo
micinfo Utility Log
Created On Fri Aug 18 12:08:28 2017

System Info:
    Host OS                        : Windows
    OS Version                     : Windows 10
    MPSS Version                   : 4.4.0.4724
    Host Physical Memory           : 16294 MB

Device No: 0, Device Name: mic0 [x200]

Version:
    SMC Firmware Version           : 121.31.10446
    Coprocessor OS Version         : 4.9.13-mpss_4.4.0.4724 GNU/Linux
    Device Serial Number           : QSKL71100027
    BIOS Version                   : GVPRCRB8.86B.0015.D04.1704072131
    BIOS Build date                : 04/07/2017
    ME Version                     : 3.2.2.8

Can someone help me figure this out ? Thank you!

Hi All,

I want to read specific MSR for Intel Xeon Phi 7210. Before this, I never wrote code to do so. Can anyone please answer:

1) Which software guide should I read to understand which Xeon Phi MSR does what?
2) Any sample code I can refer?
3) I have used turbostat and looking to read all the MSR read by this tool. The source code of this tool is a bit large, so any pointers will help.

I tried msr-tools, but without knowing which MSR does what and what address to use, it's getting difficult to get hold of it. 

Please advise. Thanks.

Hi,

I have three boards that does not have any brackets that came from a server installation.  I need brackets to fasten them to a desktop chassis.  Is there someplace I can buy them?

Thanks,

John

Dear all,

Please help me with the problem: sometimes, I access the Xeon Phi cards by ssh, however, it takes a short time and kicks me out, the user for access is just a normal user. It has not occurred with root user. After that, I restart the service MPSS and it is ok.

Actually, I don't know the reason why, please help me with this problem. Below is the information of our Xeon Phi cards:

MicInfo Utility Log

Created Wed Aug 23 11:43:00 2017

System Info

HOST OS : Linux

OS Version : 3.10.0-514.21.1.el7.x86_64

Driver Version : 3.8-1

MPSS Version : 3.8

Host Physical Memory : 257518 MB

Device No: 0, Device Name: mic0

Version

Flash Version : 2.1.02.0391

SMC Firmware Version : 1.17.6900

SMC Boot Loader Version : 1.8.4326

Coprocessor OS Version : 2.6.38.8+mpss3.8

Device Serial Number : ADKC44700369

Board

Vendor ID : 0x8086

Device ID : 0x225c

Subsystem ID : 0x7d95

Coprocessor Stepping ID : 2

PCIe Width : Insufficient Privileges

PCIe Speed : Insufficient Privileges

PCIe Max payload size : Insufficient Privileges

PCIe Max read req size : Insufficient Privileges

Coprocessor Model : 0x01

Coprocessor Model Ext : 0x00

Coprocessor Type : 0x00

Coprocessor Family : 0x0b

Coprocessor Family Ext : 0x00

Coprocessor Stepping : C0

Board SKU : C0PRQ-7120 P/A/X/D

ECC Mode : Enabled

SMC HW Revision : Product 300W Passive CS

Cores

Total No of Active Cores : 61

Voltage : 1029000 uV

Frequency : 1238095 kHz

Thermal

Fan Speed Control : N/A

Fan RPM : N/A

Fan PWM : N/A

Die Temp : 58 C

GDDR

GDDR Vendor : Samsung

GDDR Version : 0x6

GDDR Density : 4096 Mb

GDDR Size : 15872 MB

GDDR Technology : GDDR5

GDDR Speed : 5.500000 GT/s

GDDR Frequency : 2750000 kHz

GDDR Voltage : 1501000 uV

Device No: 1, Device Name: mic1

Version

Flash Version : 2.1.02.0391

SMC Firmware Version : 1.17.6900

SMC Boot Loader Version : 1.8.4326

Coprocessor OS Version : 2.6.38.8+mpss3.8

Device Serial Number : ADKC50600135

Board

Vendor ID : 0x8086

Device ID : 0x225c

Subsystem ID : 0x7d95

Coprocessor Stepping ID : 2

PCIe Width : Insufficient Privileges

PCIe Speed : Insufficient Privileges

PCIe Max payload size : Insufficient Privileges

PCIe Max read req size : Insufficient Privileges

Coprocessor Model : 0x01

Coprocessor Model Ext : 0x00

Coprocessor Type : 0x00

Coprocessor Family : 0x0b

Coprocessor Family Ext : 0x00

Coprocessor Stepping : C0

Board SKU : C0PRQ-7120 P/A/X/D

ECC Mode : Enabled

SMC HW Revision : Product 300W Passive CS

Cores

Total No of Active Cores : 61

Voltage : 1003000 uV

Frequency : 1238095 kHz

Thermal

Fan Speed Control : N/A

Fan RPM : N/A

Fan PWM : N/A

Die Temp : 53 C

GDDR

GDDR Vendor : Samsung

GDDR Version : 0x6

GDDR Density : 4096 Mb

GDDR Size : 15872 MB

GDDR Technology : GDDR5

GDDR Speed : 5.500000 GT/s

GDDR Frequency : 2750000 kHz

GDDR Voltage : 1501000 uV