Data transfer between MIC in offload model
Hi,I would like to ask, if is it possible to echange data directly between two MICs in offload model? My application belongs to forward-in-time groups of algorithms. Due to data dependencies, I have...
View ArticlePhi x200 not found? Help?
I'm trying to get up and running with a Phi 7220p Coprocessor card. I'm running on Windows 10, installed mpss 3.8, but I do not see the coprocessor in Device manager. miccheck reports that driver...
View Articlecan I use Xeon Phi processor as a small cluster?
forgive me if the question sounds naive.I am interested in configuring a server system. I understand that the x200 xeon phi can be used as a standalone CPU and provide up to 72 cores and 288 threads. I...
View ArticleXeon Phi 7250 64-second period event
Hi,We are running a real-time process on the 7250, which takes about 560 microseconds per cycle. Every 64 seconds, we see a spike in time, where it takes about 200 microseconds longer.We've done...
View Articledata race sensitivity
I'm grading student programs that are multithreaded using OpenMP. They ran timing tests on the MTL. Several of the programs have race conditions. When I run these programs on a processor other than the...
View ArticleForced mic offload reset
Hi all Just wondering if there are any explicit 'MIC reset' pragmas that can reset any offloading commands. This is to ensure the offload stack is clean between executables. To avoid confusion: I am...
View ArticlePeak performance, bandwidth and latency of the sever
I have a server with these properties: Processor type: Intel Xeon E5345 Number of calculation nodes: 47 Calculation number of kernel: 376 The amount of node memory is: 16 GB Performance networking: 20...
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Performance evaluation of a parallel matrix-marix multiply
I am running parallel programing codes on a server with these properties:Processor type: Intel Xeon E5345 Number of calculation nodes: 47 Calculation number of kernel: 376 The amount of node memory is:...
View ArticleXeon Phi 71S1P Specifications?
Hi,I purchased a used Phi coprocessor. The sticker on it says 71S1P. Does anyone know what the specifications of this card are? It shows up in a couple random intel documents, but no specs.I was able...
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Xeon Phi Driver weirdness?
I'm getting an unusual error in device manager (see attached screenshot) in Windows 10 Creators Update. I installed the MPSS 4 drivers, and as noted, the card is detected in device manager.The device...
View ArticleAES-NI and Phi
Hi, I have done some research but did not find the information I need on the use of AES-NI instructions with the new Phi. Specifically, I am looking for information on latency, timing and...
View Articlewhat is the naming convention for "Intel Confidential NA QNMN 2.80GHZ...
Sir/Madam,what is the naming convention for "Intel Confidential NA QNMN 2.80GHZ L717B425 (e4) ?Sincerely,Liu
View ArticlePhi roadmap
Hi,Now that the Knights Hill has been cancelled, what does the future roadmap for the Phi look like? Should we be considering future Phi upgrades for our systems, or is the Knights Mill essentially...
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Two parallel cblas_dgemm on XeonPhi 7210
I intend to run two parallel cblas_dgemm instances, and used the following code snippet: #pragma omp parallel num_threads(2) { if (omp_get_thread_num() == 0){...
View Article-assume contiguous_assumed_shape and contiguous keyword not working
Hi,I am trying to vectorize the following loop. The loop is defined inside a subroutine using shape arrays. I am using -assume contiguous_assumed_shape as well as contiguous keyword but the compiler...
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Environment settings on KNL (KMP_AFFINITY and KMP_HW_SUBSET)
Hallo, When running codes on our KNL nodes at LRZ (64 cores) using OpenMP with "KMP_AFFINITY=verbose" and one of the pinning settings (either compact or scatter), the core IDs printed in the output do...
View ArticleHow to debug a library used by a program in the offload section?
Hi!I want to debug my library which my program uses in the offload section.1. I tried to use library with debugging information. I use the following command line to build the library::: set...
View ArticleKNL - Compiler clearing dest. register for gather/scatter
Hello,I discovered that the icpc (17.01) for xmic-avx512 (KNL) clears the destination register before the corresponding gather instruction by introducing vpxord %zmm2, %zmm2, %zmm2 although I am using...
View ArticleXeon Phi - Balanced vs Scatter - 64 or Less Threads
Hi All,If the number of threads to use are 32 or any number equal or less than 64. Then, how does balance and scatter thread affinity differ from each other?As per my analysis, these two will use same...
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