Segmentation Fault with WRF
I have compiled WRF v3.5 in (dm+sm) par mode with all necessary libraries for Intel MIC.I am getting the error "APPLICATION TERMINATED WITH THE EXIT STRING: Segmentation fault (signal 11)" when...
View ArticleBright Cluster Manager 6.1 Delivers Full Support for the Intel Xeon Phi and...
News ReleaseJune 11, 2013 Bright Cluster Manager 6.1 Delivers Full Support for the Intel Xeon Phi and Amazon VPCSan Jose, California — Bright Computing, the leading, vendor-independent provider of...
View ArticleSeismic Unix Package compilation for MIC
I am trying to compile Seismic Unix Pakage from CWP but while compiling it generates mic executable which is not executed on Xeon. Do anyone have have experience for Seismic Unix compilation for MIC....
View ArticleUsing Implicit Offload Copy from C function within Fortran code?
If one was to write a C function that allocated the memory and performed the offload operation, and it was called from within a Fortran code (so, ostensibly compiled with icc then ifort), could it...
View ArticleCapacity abort when using RTM provided by haswell
Hi, Sorry, maybe here is not the right place to ask a question about rtm provided by haswell, but i don't know where should I post my question. I run a simple test case with the xbegin and xend...
View ArticleCapacity abort when using RTM provided by haswell
Hi, Sorry, maybe here is not the right place to ask a question about rtm provided by haswell, but i don't know where should I post my question. I run a simple test case with the xbegin and xend...
View ArticleHow was libc compiled ?
Does anyone know compilation details of glibc distributed with mpss ?Was icc used and with what flags ?I am seeing particularly slow execution of functions like strtod, fprintf, malloc, etc.
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Using Offload in Dynamic Shared Library for Postgres
Hello!I need to compile user defined functions in C language for Postgres. These functions may offload some work to MIC.The problem is that Postgres drop session on any #pragma offload.I make minimal...
View ArticleMPI_Init got frozen if launch programs at two MICs in the same host
Hi,I am writing some toy code to test the MPI programming on MICs. My code worked on one Xeon Phi card, also worked between host and one Xeon Phi card, but got frozen if running on two Xeon Phi cards...
View ArticleMIC debugger : idbc_mic : error while loading libmyodbl-service.so
Hi,I'm trying to debug natively an application on MIC.I use idb_mic as debugger however, when launching idbc_mic -tco -rconnect=tcpip:mic0:2000 command, I get this error :./idbserver_mic: error while...
View ArticleBug in the gnu assembler for the MIC
I am using the gnu assembler with intel syntax for the MIC and I am encountering a bug in its store addressing.I want to move an interger from the FPU to the eax register and I am doing it by the...
View ArticleOpenMP not supported with Intel MIC debugger
Hi,When I want to debug an OpenMP application on MIC I get the following warning :Can't load libomp_db library. OpenMP support is disabled.$threadlevel is set to "native".So I can debug but only in...
View Articlelow I/O performance of Xeon Phi card
I mounted a directory of host to mic0. Then I wrote a toy MIC program in native mode to read file from this nfs directory. It turned out that the performance of reading from host disk is extemely...
View ArticleAssembly code on Xeon Phi
Hi, I have a piece of assembly code which is written in NASM syntax. This is a vectorization code so we want to test it on Xeon Phi. I apologize if my question sounds too naive because this is the...
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Troubleshooting HOWTO: Bad hardware? MPSS? Configuration?
Are you having problems with your hardware (Cannot see your Intel(R) Xeon Phi(tm) coprocessor? Sporadic accessibility?) or with the Intel(R) Manycore Platform Software Stack (Intel(R) MPSS) running...
View ArticleAlpha release of the Glasgow Pascal compiler for the MIC
Alpha version of Vector Pascal for the Xeon Phi now released on sourceforge https://sourceforge.net/projects/vectorpascalcom/files/?source=navbar For the Intel MIC (Xeon Phi)The compiler works as a...
View ArticleOffloading 2d arrays in C/C++ using pragmas - problems
I'm trying to offload a dynamically allocated 2d array of floats. I can't seem to get it to work however. My code is this: #include <stdio.h> #include <stdlib.h> float **alloc_2d(int rows,...
View ArticleHow many general vector registors does the MIC vpu have?
From http://software.intel.com/en-us/articles/intel-xeon-phi-coprocessor-vect... :"The VPU state per thread is maintained in 32 512-bit general vector registers (zmm0-zmm31), 8 16-bit mask registers...
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