How to turn off ECC?
Hey all, simple question. How can I turn off ECC on KNC? ThanksPatrick
View ArticleGuaranteed atomic operations on Xeon Phi
The IA32 and Intel64 (host) processors have Guaranteed Atomic Operations for load and store ofbyte word aligned word double word aligned double word P6 and later aligned and unaligned word, dword and...
View ArticleL2_DATA_READ/WRITE_MISS_CACHE_FILL
I am executing a single threaded copy read program which is pinned to a core. and the program is complied with -O0 -no-vec -no-opt-prefetch options.#include<stdio.h>static int...
View Articleicpc 14.0.1 error 10014
I am having problem with 2013_sp1. The code that compiles fine with last version suddenly fails to build with the following error message:": internal error: ** segmentation violation signal raised...
View ArticleIntel Xeon Phi direct data feed from FPGA via PCI Express
Hello.Suppose we have a system that consists of a host processor, FPGA card and a Xeon Phi processor connected with a PCI Express fabric. Data is acquired at FPGA card and should be processed at Xeon...
View ArticleExpression assignment problem on MIC
I faced a strange problem. My program is running on MIC, and after I finished calculating an expression then assigned it to a variable, the problem cracked. The variable I assigned right now keeps zero...
View ArticleHow to allocate memory in MIC correctly?
I'm trying MIC and encountered a strange problem about how to allocate memory on MIC.I write a example program like THIS: #include <stdio.h> #include <stdlib.h> __attribute__...
View ArticleManually control MIC SIMD operations.
I wants to manually manage my code's the SIMD operations on MIC, and write the intrinsics below _k_mask = _mm512_int2mask(0x7ff); // 0000 0111 1111 1111 _tempux2_512 =...
View Articlesegmentation fault
I am working on a openmp enabled code . whenever I make a native run there is segmentation fault on MIC but code runs fine on XEON .Arrays are 64 byte aligned and using #pragma vector aligned in a for...
View Articleoffload error: cannot get device 0 handle (error code 2)
Hi, I have written a simulation code that offloads part of the simulation to MIC cards using #pragma offload. We have two MIC cards in our system. After running the simulation, I notice that the...
View Articlewhat is Memory Bank?
Hi all,Sorry if I post this question in at a wrong place, I don't know which forum should be...If I was wrong, pls direct me to the appropriate forum.I would like to know what is Memory Bank, is there...
View ArticleEclipse Remote Debugging
I am following the instructions to get native remote debugging working in Eclipse. I've had to modifiy them a bit because I am using MPSS 2.1 and the instructions are for ComposerXE. A quick...
View ArticleXeon Phi 3120A Fan Speed
Is there a way to set the fan at a higher speed?My fan doesn't kick in until the temperature is around 81 or 82 degrees, which concerns me because it pretty much stays at 81/82 degrees and I would like...
View ArticleXeon Phi 3120A Fan Speed
Is there a way to set the fan at a higher speed?My fan doesn't kick in until the temperature is around 81 or 82 degrees, which concerns me because it pretty much stays at 81/82 degrees and I would like...
View ArticleOffload error
Dear all, I'm a novice for MIC programming and I encountered a offload error when I want to run an example code on the host and offload part of the code to MIC cores for multithread-computing based on...
View ArticleDocumentation for kernel development?
Are there any resources available for those who might wish to recompile the Linux kernel used on the Phi? Are there any tools in MPSS to help us recompile k1om Linux and/or boot it? I'm using MPSS...
View ArticleHPL performance on MIC
The HPL benchmark performance obtained on a host + 2 MIC cards is coming only 719GFlops. The Host system has 128 GB memory. The theoretical peak is 1.2TF + 1.2TF + 460GFLOPS = 2.8TF. Efficiency is just...
View ArticleHow is the Linux kernel distributed with MPSS 3.1.2 compiled?
I've been trying to understand a performance bug involving the Linux kernel. I rebuilt the MIC's kernel planning to make changes in order to explore the problem. I've used the GCC cross-compiler and...
View ArticleIntel Intrinsic support for Atom
Hi Everyone,I have an application which was designed for inteli 7 using SSE to AVX, now I want the same application to run on Atom Processors.I was recently browsing net for intrinsic support for Atom...
View ArticleHow to get a hold of a cluster with phi
Is there any ways paid or free that I can get access to a cluster with at least 1 Xeon Phi on it? Thanks in advance!
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